Sfoglia per Autore
Analyzing On-Chip Communication in a MPSoC Environment
2004-01-01 Loghi, Mirko; Angiolini, F; Bertozzi, D; Benini, L; Zafalon, R.
Cycle-accurate power analysis for multiprocessor systems-on-a-chip
2004-01-01 Loghi, Mirko; Poncino, M; Benini, L.
Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor
2004-01-01 Loghi, Mirko; Poncino, M; Benini, L.
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions
2005-01-01 Loghi, Mirko; Poncino, M.
Dynamic and Formal Verification of Embedded Systems: A Comparative Survey
2005-01-01 Loghi, Mirko; Margaria, T; Pravadelli, G; Steffen, B.
Virtual Hardware Prototyping Through Timed Hardware-Software Co-Simulation
2005-01-01 F., Fummi; Loghi, Mirko; S., Martini; M., Monguzzi; G., Perbellini; M., Poncino
Tag Overflow Buffering: An Energy-Efficient Cache Architecture
2005-01-01 Loghi, Mirko; Azzoni, P; Poncino, M.
Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors
2005-01-01 Loghi, Mirko; Letis, M; Benini, L; Poncino, M.
Synchronization-driven dynamic speed scaling for MPSoCs
2006-01-01 Loghi, Mirko; Poncino, M; Benini, L.
ISS-centric modular HW/SW co-simulation
2006-01-01 Fummi, F; Perbellini, G; Loghi, Mirko; Poncino, M.
Cache coherence tradeoffs in shared-memory MPSoCs
2006-01-01 Loghi, Mirko; Poncino, M; Benini, L.
Power macromodeling of MPSoC message passing primitives
2007-01-01 Loghi, Mirko; Benini, L; Poncino, M.
On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors
2007-01-01 Golubeva, O; Loghi, Mirko; Poncino, M.
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support
2007-01-01 Poletti, F; Poggiali, A; Bertozzi, D; Benini, L; Marchal, P; Loghi, Mirko; Poncino, M.
Architectural leakage-aware management of partitioned scratchpad memories
2007-01-01 Golubeva, O; Loghi, Mirko; Poncino, M; Macii, E.
SystemC co-simulation for core-based embedded systems
2007-01-01 Fummi, F; Loghi, Mirko; Perbellini, G; Poncino, M.
Locality-driven architectural cache sub-banking for leakage energy reduction
2007-01-01 Loghi, Mirko; Golubeva, O; Poncino, M; Macii, E.
Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching
2009-01-01 Loghi, Mirko; Azzoni, P; Poncino, M.
Energy-optimal synchronization primitives for single-chip multi-processors
2009-01-01 Ferri, C; R., BAHAR I; Loghi, Mirko; Poncino, M.
A cosimulation methodology for HW/SW validation and performance estimation
2009-01-01 Fummi, F; Loghi, Mirko; Poncino, M.; Pravadelli, G.
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