This work reports about the system level design of a transmitter for the next generation of High-Speed Serial Interfaces (HSSI) to be implemented in a micro-controller for automotive Electronic Control Unit (ECU) applications, pushing the transmission speed up to 10 Gbps over a 10cm long cable. A voltage mode architecture is selected for low power considerations. We focus our analysis here on the system-level implementation of Feed-Forward Equalization as an FIR filter consisting of different transmitter slices driven by different bits in the data sequence. We consider different data rates and number of taps and analyze how the performance of the equalizer is affected by thequantization of the values of the taps in the practical implementation of the FIR filter.
Design of a transmitter for high-speed serial interfaces in automotive micro-controller
PALESTRI, Pierpaolo
2016-01-01
Abstract
This work reports about the system level design of a transmitter for the next generation of High-Speed Serial Interfaces (HSSI) to be implemented in a micro-controller for automotive Electronic Control Unit (ECU) applications, pushing the transmission speed up to 10 Gbps over a 10cm long cable. A voltage mode architecture is selected for low power considerations. We focus our analysis here on the system-level implementation of Feed-Forward Equalization as an FIR filter consisting of different transmitter slices driven by different bits in the data sequence. We consider different data rates and number of taps and analyze how the performance of the equalizer is affected by thequantization of the values of the taps in the practical implementation of the FIR filter.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
