Experimental results are interpreted in terms of a simple lumped-element model that is also used to reproduce the hysteresis phenomenon with discrete components. The hysteresis is related to a three-dimensional (3-D) nonuniformity in the current distribution. Such hysteresis can lead to an erroneous evaluation of latchup parameters, such as the holding current density.

Hysteresis cycle in the Latch-up characteristic of wide CMOS structures

SELMI, Luca;SANGIORGI, Enrico;
1988-01-01

Abstract

Experimental results are interpreted in terms of a simple lumped-element model that is also used to reproduce the hysteresis phenomenon with discrete components. The hysteresis is related to a three-dimensional (3-D) nonuniformity in the current distribution. Such hysteresis can lead to an erroneous evaluation of latchup parameters, such as the holding current density.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11390/681895
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