LOGHI, Mirko

LOGHI, Mirko  

DPIA - DIPARTIMENTO POLITECNICO DI INGEGNERIA E ARCHITETTURA  

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Risultati 1 - 20 di 42 (tempo di esecuzione: 0.043 secondi).
Titolo Data di pubblicazione Autore(i) File
A cosimulation methodology for HW/SW validation and performance estimation 1-gen-2009 Fummi, F; Loghi, Mirko; Poncino, M.; Pravadelli, G.
Aging effects of leakage optimizations for caches 1-gen-2010 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Aging-Aware Caches with Graceful Degradation of Performance 1-gen-2012 Mahmood, H; Loghi, Mirko; Macii, E; Poncino, M.
Analyzing On-Chip Communication in a MPSoC Environment 1-gen-2004 Loghi, Mirko; Angiolini, F; Bertozzi, D; Benini, L; Zafalon, R.
Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor 1-gen-2004 Loghi, Mirko; Poncino, M; Benini, L.
Application-specific memory partitioning for joint energy and lifetime optimization. 1-gen-2012 Mahmood, H; Poncino, M; Loghi, Mirko; Macii, E.
Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking 1-gen-2010 Loghi, Mirko; Golubeva, O; Macii, E; Poncino, M.
Architectural leakage-aware management of partitioned scratchpad memories 1-gen-2007 Golubeva, O; Loghi, Mirko; Poncino, M; Macii, E.
Autotuning technique for digital constant on-time controllers 1-gen-2014 Saggini, Stefano; Loghi, Mirko; Zambetti, O.; Zafarana, A.; Corradini, L.
Buffering of frequent accesses for reduced cache aging 1-gen-2011 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Cache coherence tradeoffs in shared-memory MPSoCs 1-gen-2006 Loghi, Mirko; Poncino, M; Benini, L.
Cycle-accurate power analysis for multiprocessor systems-on-a-chip 1-gen-2004 Loghi, Mirko; Poncino, M; Benini, L.
Dynamic and Formal Verification of Embedded Systems: A Comparative Survey 1-gen-2005 Loghi, Mirko; Margaria, T; Pravadelli, G; Steffen, B.
Dynamic indexing: concurrent leakage and aging optimization for caches 1-gen-2010 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Dynamic Indexing: Leakage-Aging Co-Optimization for Caches 1-gen-2014 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support 1-gen-2007 Poletti, F; Poggiali, A; Bertozzi, D; Benini, L; Marchal, P; Loghi, Mirko; Poncino, M.
Energy-optimal caches with guaranteed lifetime 1-gen-2012 Loghi, Mirko; Mahmood, H; Calimera, A; Poncino, M; Macii, E.
Energy-optimal synchronization primitives for single-chip multi-processors 1-gen-2009 Ferri, C; R., BAHAR I; Loghi, Mirko; Poncino, M.
Energy/lifetime cooptimization by cache partitioning with graceful performance degradation 1-gen-2014 Mahmood, Haroon; Loghi, Mirko; Poncino, Massimo; Macii, Enrico
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions 1-gen-2005 Loghi, Mirko; Poncino, M.