MENIN, DAVIDE

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MENIN, DAVIDE

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DPIA - DIPARTIMENTO POLITECNICO DI INGEGNERIA E ARCHITETTURA

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Risultati 1 - 9 di 9 (tempo di esecuzione: 0.025 secondi).

A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces

2019-01-01 Cortiula, A.; Dazzi, M.; Marcon, M.; Menin, D.; Scapol, M.; Bandiziol, A.; Cristofoli, A.; Grollitsch, W.; Nonis, R.; Palestri, P.

A Simple Modelling Tool for Fast Combined Simulation of Interconnections, Inter-Symbol Interference and Equalization in High-Speed Serial Interfaces for Chip-to-Chip Communications

2020-01-01 Menin, Davide; Bernardi, Thomas; Cortiula, Alessio; Dazzi, Martino; Prà, Alessio De; Marcon, Mattia; Scapol, Marco; Bandiziol, Andrea; Brandonisio, Francesco; Cristofoli, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo

A Simple Simulation Approach for the Estimation of Convergence and Performance of Fully Adaptive Equalization in High-Speed Serial Interfaces

2019-01-01 Menin, Davide; De Pra, Alessio; Bandiziol, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo

A Time-Domain Simulation Framework for the Modeling of Jitter in High-Speed Serial Interfaces

2022-01-01 Cortiula, A.; Menin, D.; Bandiziol, A.; Grollitsch, W.; Nonis, R.; Palestri, P.

Analytical Modeling of Jitter in Bang-Bang CDR Circuits Featuring Phase Interpolation

2021-01-01 Palestri, P.; Elnaqib, A.; Menin, D.; Shyti, K.; Brandonisio, F.; Bandiziol, A.; Rossi, D.; Nonis, R.

Automotive-Range Characterization of a 11 Gb/s Transceiver for Automotive Microcontroller Applications with 8-Tap FFE, 1-Tap Unrolled/3-Tap DFE and Offset-Compensated Samplers

2019-01-01 D'Ampolo, Dylan; Bandiziol, Andrea; Menin, Davide; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo

Design and Simulation of a 12 Gb/s Transceiver With 8-Tap FFE, Offset-Compensated Samplers and Fully Adaptive 1-Tap Speculative/3-Tap DFE and Sampling Phase for MIPI A-PHY Applications

2020-01-01 Menin, Davide; Bandiziol, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo

Modelling and Design of High-Speed Wireline Transceivers with Fully-Adaptive Equalization

2022-03-08 Menin, Davide

Simulation and automated characterisation of optimal load for flexible composite generators based on piezoelectric ZnO nanowires

2018-01-01 Menin, Davide; Parmar, M.; Tao, R.; Oliveira, P.; Mouis, M.; Selmi, L.; Ardila, G.

Titolo	Data di pubblicazione	Autore(i)
A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces	1-gen-2019	Cortiula, A.; Dazzi, M.; Marcon, M.; Menin, D.; Scapol, M.; Bandiziol, A.; Cristofoli, A.; Grollitsch, W.; Nonis, R.; Palestri, P.
A Simple Modelling Tool for Fast Combined Simulation of Interconnections, Inter-Symbol Interference and Equalization in High-Speed Serial Interfaces for Chip-to-Chip Communications	1-gen-2020	Menin, Davide; Bernardi, Thomas; Cortiula, Alessio; Dazzi, Martino; Prà, Alessio De; Marcon, Mattia; Scapol, Marco; Bandiziol, Andrea; Brandonisio, Francesco; Cristofoli, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
A Simple Simulation Approach for the Estimation of Convergence and Performance of Fully Adaptive Equalization in High-Speed Serial Interfaces	1-gen-2019	Menin, Davide; De Pra, Alessio; Bandiziol, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
A Time-Domain Simulation Framework for the Modeling of Jitter in High-Speed Serial Interfaces	1-gen-2022	Cortiula, A.; Menin, D.; Bandiziol, A.; Grollitsch, W.; Nonis, R.; Palestri, P.
Analytical Modeling of Jitter in Bang-Bang CDR Circuits Featuring Phase Interpolation	1-gen-2021	Palestri, P.; Elnaqib, A.; Menin, D.; Shyti, K.; Brandonisio, F.; Bandiziol, A.; Rossi, D.; Nonis, R.
Automotive-Range Characterization of a 11 Gb/s Transceiver for Automotive Microcontroller Applications with 8-Tap FFE, 1-Tap Unrolled/3-Tap DFE and Offset-Compensated Samplers	1-gen-2019	D'Ampolo, Dylan; Bandiziol, Andrea; Menin, Davide; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
Design and Simulation of a 12 Gb/s Transceiver With 8-Tap FFE, Offset-Compensated Samplers and Fully Adaptive 1-Tap Speculative/3-Tap DFE and Sampling Phase for MIPI A-PHY Applications	1-gen-2020	Menin, Davide; Bandiziol, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
Modelling and Design of High-Speed Wireline Transceivers with Fully-Adaptive Equalization	8-mar-2022	Menin, Davide
Simulation and automated characterisation of optimal load for flexible composite generators based on piezoelectric ZnO nanowires	1-gen-2018	Menin, Davide; Parmar, M.; Tao, R.; Oliveira, P.; Mouis, M.; Selmi, L.; Ardila, G.