IRIS

Sfoglia per Autore  

Opzioni
Mostrati risultati da 1 a 43 di 43
Titolo Data di pubblicazione Autore(i) File
Cycle-accurate power analysis for multiprocessor systems-on-a-chip 1-gen-2004 Loghi, Mirko; Poncino, M; Benini, L.
Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor 1-gen-2004 Loghi, Mirko; Poncino, M; Benini, L.
Analyzing On-Chip Communication in a MPSoC Environment 1-gen-2004 Loghi, Mirko; Angiolini, F; Bertozzi, D; Benini, L; Zafalon, R.
Dynamic and Formal Verification of Embedded Systems: A Comparative Survey 1-gen-2005 Loghi, Mirko; Margaria, T; Pravadelli, G; Steffen, B.
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions 1-gen-2005 Loghi, Mirko; Poncino, M.
Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors 1-gen-2005 Loghi, Mirko; Letis, M; Benini, L; Poncino, M.
Virtual Hardware Prototyping Through Timed Hardware-Software Co-Simulation 1-gen-2005 F., Fummi; Loghi, Mirko; S., Martini; M., Monguzzi; G., Perbellini; M., Poncino
Tag Overflow Buffering: An Energy-Efficient Cache Architecture 1-gen-2005 Loghi, Mirko; Azzoni, P; Poncino, M.
Cache coherence tradeoffs in shared-memory MPSoCs 1-gen-2006 Loghi, Mirko; Poncino, M; Benini, L.
ISS-centric modular HW/SW co-simulation 1-gen-2006 Fummi, F; Perbellini, G; Loghi, Mirko; Poncino, M.
Synchronization-driven dynamic speed scaling for MPSoCs 1-gen-2006 Loghi, Mirko; Poncino, M; Benini, L.
Power macromodeling of MPSoC message passing primitives 1-gen-2007 Loghi, Mirko; Benini, L; Poncino, M.
On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors 1-gen-2007 Golubeva, O; Loghi, Mirko; Poncino, M.
SystemC co-simulation for core-based embedded systems 1-gen-2007 Fummi, F; Loghi, Mirko; Perbellini, G; Poncino, M.
Architectural leakage-aware management of partitioned scratchpad memories 1-gen-2007 Golubeva, O; Loghi, Mirko; Poncino, M; Macii, E.
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support 1-gen-2007 Poletti, F; Poggiali, A; Bertozzi, D; Benini, L; Marchal, P; Loghi, Mirko; Poncino, M.
Locality-driven architectural cache sub-banking for leakage energy reduction 1-gen-2007 Loghi, Mirko; Golubeva, O; Poncino, M; Macii, E.
Energy-optimal synchronization primitives for single-chip multi-processors 1-gen-2009 Ferri, C; R., BAHAR I; Loghi, Mirko; Poncino, M.
A cosimulation methodology for HW/SW validation and performance estimation 1-gen-2009 Fummi, F; Loghi, Mirko; Poncino, M.; Pravadelli, G.
Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching 1-gen-2009 Loghi, Mirko; Azzoni, P; Poncino, M.
Aging effects of leakage optimizations for caches 1-gen-2010 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking 1-gen-2010 Loghi, Mirko; Golubeva, O; Macii, E; Poncino, M.
Dynamic indexing: concurrent leakage and aging optimization for caches 1-gen-2010 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Partitioned cache architectures for reduced NBTI-induced aging 1-gen-2011 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Buffering of frequent accesses for reduced cache aging 1-gen-2011 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Energy-optimal caches with guaranteed lifetime 1-gen-2012 Loghi, Mirko; Mahmood, H; Calimera, A; Poncino, M; Macii, E.
Aging-Aware Caches with Graceful Degradation of Performance 1-gen-2012 Mahmood, H; Loghi, Mirko; Macii, E; Poncino, M.
Application-specific memory partitioning for joint energy and lifetime optimization. 1-gen-2012 Mahmood, H; Poncino, M; Loghi, Mirko; Macii, E.
Siti sommersi in alto Adriatico: un progetto di archeologia e ingegneria per la tutela e valorizzazione in situ 1-gen-2013 Capulli, Massimo; Rinaldo, Roberto; Asta, Alessandro; BOSCOLO NALE, Stefano; Fozzati, Luigi; Loghi, Mirko; Minguzzi, Simonetta; Roberto, Vito; Saggini, Stefano
Firefly-Inspired Synchronization of Sensor Networks with Variable Period Lengths 1-gen-2013 Stefan, Wieser; Montessoro, Pier Luca; Loghi, Mirko
Real-Time Channel Sounding for Channel-Adaptive Data Links 1-gen-2014 Ganis, ALEXANDER RUDOLF; Bluemm, C.; Heller, C.; Loghi, Mirko
Dynamic Indexing: Leakage-Aging Co-Optimization for Caches 1-gen-2014 Calimera, A; Loghi, Mirko; Macii, E; Poncino, M.
Energy/lifetime cooptimization by cache partitioning with graceful performance degradation 1-gen-2014 Mahmood, Haroon; Loghi, Mirko; Poncino, Massimo; Macii, Enrico
Autotuning technique for digital constant on-time controllers 1-gen-2014 Saggini, Stefano; Loghi, Mirko; Zambetti, O.; Zafarana, A.; Corradini, L.
A system concept for a 3D real-Time OFDM MIMO radar for flying platforms 1-gen-2016 Ganis, ALEXANDER RUDOLF; Miralles, Enric; Heller, Christoph; Prechtel, Ulrich; Meusling, Askold; Feldle, Heinz Peter; Loghi, Mirko; Ellinger, Frank; Ziegler, Volker
Local Area Cloud: a distributed, fault tolerant, and self-configuring architecture for smart home automation 1-gen-2017 Palma, David; Montessoro, Pier Luca; Loghi, Mirko
Low-cost Jamming System Against Small Drones Using a 3D MIMO Radar Based Tracking 1-gen-2017 Multerer, T; Ganis, A; Prechtel, U; Miralles, E; Meusling, A; Mietzner, J; Vossiek, M; Loghi, M; Ziegler, V
A Portable 3-D Imaging FMCW MIMO Radar Demonstrator With a 24x24 Antenna Array for Medium-Range Applications 1-gen-2017 Ganis, Alexander; Navarro, Enric Miralles; Schoenlinner, Bernhard; Prechtel, Ulrich; Meusling, Askold; Heller, Christoph; Spreng, Thomas; Mietzner, Jan; Krimmer, Christian; Haeberle, Babette; Lutz, Steffen; Loghi, Mirko; Belenguer, Angel; Esteban, Hector; Ziegler, Volker
Multifunctional and compact 3D FMCW MIMO radar system with rectangular array for medium-range applications 1-gen-2018 Miralles, E.; Multerer, T.; Ganis, A.; Schoenlinner, B.; Prechtel, U.; Meusling, A.; Mietzner, J.; Weckerle, C.; Esteban, H.; Vossiek, M.; Loghi, M.; Ziegler, V.
Ferroelectric based FETs and synaptic devices for highly energy efficient computational technologies 1-gen-2021 Esseni, D.; Fontanini, R.; Lizzit, D.; Massarotto, M.; Driussi, F.; Loghi, M.
Modelling and design of FTJs as multi-level low energy memristors for neuromorphic computing 1-gen-2021 Fontanini, Riccardo; Segatto, Mattia; Massarotto, Marco; Specogna, Ruben; Driussi, Francesco; Loghi, Mirko; Esseni, David
Modelling and design of FTJs as high reading-impedance synaptic devices 1-gen-2021 Fontanini, R.; Massarotto, M.; Specogna, R.; Driussi, F.; Loghi, M.; Esseni, D.
Reducing the Spike Rate in Deep Spiking Neural Networks 1-gen-2022 Fontanini, Riccardo; Esseni, David; Loghi, Mirko
Mostrati risultati da 1 a 43 di 43
Legenda icone

  •  file ad accesso aperto
  •  file disponibili sulla rete interna
  •  file disponibili agli utenti autorizzati
  •  file disponibili solo agli amministratori
  •  file sotto embargo
  •  nessun file disponibile