This paper introduces a novel scalable hybrid resonant converter based on the Dickson switched capacitor converter (SCC) structure for 48 V bus down-conversion. The conversion of the 48 V bus to the CPU/GPU core voltage typically includes a two-step process. First, an unregulated intermediate bus converter generates an intermediate bus voltage, commonly around 12 V. Then, a high-bandwidth multiphase voltage regulation module (VRM) provides the regulated core voltage. A lower intermediate bus voltage offers several advantages such as relaxed VRM specifications or the on-chip implementation of integrated and fully integrated voltage regulators (IVR/FIVR) in CMOS technology. To achieve a lower intermediate bus voltage, the proposed hybrid resonant SCC utilizes a multi-tapped autotrans-former (MTA) for increasing the conversion ratio. A prototype designed for converting 48 V to 3.4 V has been implemented to validate the proposed topology. A peak efficiency of 96.6 % and a maximum output current of 260 A are demonstrated. With a 48 V input voltage, the converter achieves a maximum power density of 920 W/inch3
A 260-A/48-V Bus Hybrid Resonant Converter with Large Conversion Ratio for Future Data Centers
Balutto M.;Saggini S.;
2024-01-01
Abstract
This paper introduces a novel scalable hybrid resonant converter based on the Dickson switched capacitor converter (SCC) structure for 48 V bus down-conversion. The conversion of the 48 V bus to the CPU/GPU core voltage typically includes a two-step process. First, an unregulated intermediate bus converter generates an intermediate bus voltage, commonly around 12 V. Then, a high-bandwidth multiphase voltage regulation module (VRM) provides the regulated core voltage. A lower intermediate bus voltage offers several advantages such as relaxed VRM specifications or the on-chip implementation of integrated and fully integrated voltage regulators (IVR/FIVR) in CMOS technology. To achieve a lower intermediate bus voltage, the proposed hybrid resonant SCC utilizes a multi-tapped autotrans-former (MTA) for increasing the conversion ratio. A prototype designed for converting 48 V to 3.4 V has been implemented to validate the proposed topology. A peak efficiency of 96.6 % and a maximum output current of 260 A are demonstrated. With a 48 V input voltage, the converter achieves a maximum power density of 920 W/inch3I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.