This paper investigates a fully-digital fixed frequency digital voltage-mode controller for DC-DC converters based on hysteresis modulation. The proposed architecture employes a digital-pulse width modulator (DPWM) and an analog-to-digital converter (ADC) based on a threshold inverter quantization (TIQ) technology, which enables flash-based analog-to-digital conversion and asynchronous detection of output voltage variations. One important property of the proposed solution is the high dynamic performance, since the control algorithm is based on the emulation of a hysteretic voltage mode control and on the asynchronous detection of the output voltage variations, which reduces control delay. An IC design of the TIQ-based ADC, tailored to DC-DC converters, and of a DPWM with time resolution down to 350 ps is also reported. Simulation and experimental results on a synchronous buck converter confirm the proposed analysis and the dynamic performances achievable by the proposed control architecture.
Fully-digital hysteretic voltage-mode control for dc-dc converters based on asynchronous sampling
SAGGINI, Stefano;
2008-01-01
Abstract
This paper investigates a fully-digital fixed frequency digital voltage-mode controller for DC-DC converters based on hysteresis modulation. The proposed architecture employes a digital-pulse width modulator (DPWM) and an analog-to-digital converter (ADC) based on a threshold inverter quantization (TIQ) technology, which enables flash-based analog-to-digital conversion and asynchronous detection of output voltage variations. One important property of the proposed solution is the high dynamic performance, since the control algorithm is based on the emulation of a hysteretic voltage mode control and on the asynchronous detection of the output voltage variations, which reduces control delay. An IC design of the TIQ-based ADC, tailored to DC-DC converters, and of a DPWM with time resolution down to 350 ps is also reported. Simulation and experimental results on a synchronous buck converter confirm the proposed analysis and the dynamic performances achievable by the proposed control architecture.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
