In multiple-sampled pulse width modulators (MSPWM) the sampling frequency of the modulating signal is higher than the switching frequency of the power converter. MSPWMs have been shown to exhibit a drastically lower phase lag with respect to their single-sampled counterparts, thus allowing for higher closed-loop bandwidths to be achieved. However the increased sampling frequency gives rise to nonlinear phenomena called sampling-induced dead bands that negatively affect the system operation, as they introduce zero- differential gain regions in the modulator trans characteristic. This paper proposes a correction algorithm that allows for dead-band removal, thus making the PWM gain constant with respect to the imposed modulating signal. This result is achieved by a simple solution that can be easily implemented without specific hardware requirements. Simulation and experimental results on a dc-dc synchronous buck converter are provided to show the effectiveness and overall simplicity of the proposed solution.
Elimination of sampling-induced dead bands in multiple-sampled pulse width modulators for dc-dc converters
SAGGINI, Stefano
2007-01-01
Abstract
In multiple-sampled pulse width modulators (MSPWM) the sampling frequency of the modulating signal is higher than the switching frequency of the power converter. MSPWMs have been shown to exhibit a drastically lower phase lag with respect to their single-sampled counterparts, thus allowing for higher closed-loop bandwidths to be achieved. However the increased sampling frequency gives rise to nonlinear phenomena called sampling-induced dead bands that negatively affect the system operation, as they introduce zero- differential gain regions in the modulator trans characteristic. This paper proposes a correction algorithm that allows for dead-band removal, thus making the PWM gain constant with respect to the imposed modulating signal. This result is achieved by a simple solution that can be easily implemented without specific hardware requirements. Simulation and experimental results on a dc-dc synchronous buck converter are provided to show the effectiveness and overall simplicity of the proposed solution.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.