STRANGIO, Sebastiano
STRANGIO, Sebastiano
DIEG - DIPARTIMENTO DI INGEGNERIA ELETTRICA, GESTIONALE E MECCANICA (attivo dal 01/01/1900 al 31/12/2015)
Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits
2016-01-01 Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, Marco; Crupi, Felice; Esseni, David; Selmi, Luca
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits
2017-01-01 Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, M.; Esseni, David; Crupi, F.; Selmi, Luca
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS technology node considering 28T Full-Adders
2016-01-01 Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, M.; Esseni, David; Crupi, F.; Selmi, Luca
Digital and analog TFET circuits: Design and benchmark
2018-01-01 Strangio, S.; Settino, F.; Palestri, P.; Lanuzza, M.; Crupi, F.; Esseni, D.; Selmi, L.
Early assessment of tunnel-FET for energy-efficient logic circuits
2016-01-01 Crupi, Felice; Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, Marco; Esseni, David
Experimental characterization of the Static Noise Margins of strained Silicon complementary Tunnel-FET SRAM
2017-01-01 Luong, G. V.; Strangio, Sebastiano; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, Pierpaolo; Mantl, S.; Zhao, Q. T.
Experimental examination of tunneling paths in SiGe/Si gate-normal tunneling field-effect transistors
2017-01-01 Glass, S.; von den Driesch, N.; Strangio, S.; Schulte-Braucks, C.; Rieger, T.; Narimani, K.; Buca, D.; Mantl, S.; Zhao, Q. T.
Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells
2015-01-01 Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Crupi, F.; Richter, S.; Zhao, Q.; Mantl, S.
Mixed device-circuit simulations of 6T/8T SRAM cells employing tunnel-FETs
2015-01-01 Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Crupi, F.
Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain
2015-01-01 Lanuzza, Marco; Strangio, Sebastiano; Crupi, Felice; Palestri, Pierpaolo; Esseni, David
Performance analysis of different SRAM cell topologies employing tunnel-FETs
2014-01-01 Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; F., Crupi
Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs
2017-01-01 Settino, F.; Strangio, S.; Lanuzza, M.; Crupi, F.; Palestri, P.; Esseni, D.
Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations
2018-01-01 Luong, G. V.; Strangio, S.; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, P.; Mantl, S.; Zhao, Q. T.
Understanding the Potential and Limitations of Tunnel FETs for Low-Voltage Analog/Mixed-Signal Circuits
2017-01-01 Settino, Francesco; Lanuzza, Marco; Strangio, Sebastiano; Crupi, Felice; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits | 1-gen-2016 | Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, Marco; Crupi, Felice; Esseni, David; Selmi, Luca | |
| Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits | 1-gen-2017 | Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, M.; Esseni, David; Crupi, F.; Selmi, Luca | |
| Benchmarks of a III-V TFET technology platform against the 10-nm CMOS technology node considering 28T Full-Adders | 1-gen-2016 | Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, M.; Esseni, David; Crupi, F.; Selmi, Luca | |
| Digital and analog TFET circuits: Design and benchmark | 1-gen-2018 | Strangio, S.; Settino, F.; Palestri, P.; Lanuzza, M.; Crupi, F.; Esseni, D.; Selmi, L. | |
| Early assessment of tunnel-FET for energy-efficient logic circuits | 1-gen-2016 | Crupi, Felice; Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, Marco; Esseni, David | |
| Experimental characterization of the Static Noise Margins of strained Silicon complementary Tunnel-FET SRAM | 1-gen-2017 | Luong, G. V.; Strangio, Sebastiano; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, Pierpaolo; Mantl, S.; Zhao, Q. T. | |
| Experimental examination of tunneling paths in SiGe/Si gate-normal tunneling field-effect transistors | 1-gen-2017 | Glass, S.; von den Driesch, N.; Strangio, S.; Schulte-Braucks, C.; Rieger, T.; Narimani, K.; Buca, D.; Mantl, S.; Zhao, Q. T. | |
| Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells | 1-gen-2015 | Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Crupi, F.; Richter, S.; Zhao, Q.; Mantl, S. | |
| Mixed device-circuit simulations of 6T/8T SRAM cells employing tunnel-FETs | 1-gen-2015 | Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Crupi, F. | |
| Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain | 1-gen-2015 | Lanuzza, Marco; Strangio, Sebastiano; Crupi, Felice; Palestri, Pierpaolo; Esseni, David | |
| Performance analysis of different SRAM cell topologies employing tunnel-FETs | 1-gen-2014 | Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; F., Crupi | |
| Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs | 1-gen-2017 | Settino, F.; Strangio, S.; Lanuzza, M.; Crupi, F.; Palestri, P.; Esseni, D. | |
| Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations | 1-gen-2018 | Luong, G. V.; Strangio, S.; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, P.; Mantl, S.; Zhao, Q. T. | |
| Understanding the Potential and Limitations of Tunnel FETs for Low-Voltage Analog/Mixed-Signal Circuits | 1-gen-2017 | Settino, Francesco; Lanuzza, Marco; Strangio, Sebastiano; Crupi, Felice; Palestri, Pierpaolo; Esseni, David; Selmi, Luca |