This paper presents a benchmark of a virtual III-V TFET nanowire technology platform against the predictive models of CMOS FinFETs for the 10-nm technology node. The standard 28T full adder and the 32-bits ripple carry adder are used as vehicle circuit/architecture for the comparison, respectively. Figures-ofmerit including delays, energy and energy-delay plots are discussed

Benchmarks of a III-V TFET technology platform against the 10-nm CMOS technology node considering 28T Full-Adders

STRANGIO, Sebastiano;PALESTRI, Pierpaolo;ESSENI, David;SELMI, Luca
2016

Abstract

This paper presents a benchmark of a virtual III-V TFET nanowire technology platform against the predictive models of CMOS FinFETs for the 10-nm technology node. The standard 28T full adder and the 32-bits ripple carry adder are used as vehicle circuit/architecture for the comparison, respectively. Figures-ofmerit including delays, energy and energy-delay plots are discussed
978-1-4673-8609-8
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11390/1101344
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