NONIS, Roberto

NONIS, Roberto  

DIEG - DIPARTIMENTO DI INGEGNERIA ELETTRICA, GESTIONALE E MECCANICA (attivo dal 01/01/1900 al 31/12/2015)  

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Titolo Data di pubblicazione Autore(i) File
A Model to Understand Current Consumption, Maximum Operating Frequency And Scaling Trends Of MCML Frequency Dividers 1-gen-2005 Nonis, Roberto; Palumbo, Enzo; Palestri, Pierpaolo; Selmi, Luca
A Model to Understand Current Consumption, Maximum Operating Frequency And Scaling Trends Of MCML Frequency Dividers 1-gen-2006 Nonis, Roberto; Palumbo, Enzo; Palestri, Pierpaolo; Selmi, Luca
A numerical model for the oscillation frequency, the amplitude and the phase-noise of MOS-current-mode-logic ring oscillators 1-gen-2010 Nocente, Michele; Fontanelli, D; Palestri, Pierpaolo; Nonis, Roberto; Esseni, David; Selmi, Luca
Automotive-Range Characterization of a 11 Gb/s Transceiver for Automotive Microcontroller Applications with 8-Tap FFE, 1-Tap Unrolled/3-Tap DFE and Offset-Compensated Samplers 1-gen-2019 D'Ampolo, Dylan; Bandiziol, Andrea; Menin, Davide; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
Design and characterization of a 9.2Gbps transceiver for automotive microcontroller applications with 8-taps FFE and 1-tap unrolled/4-taps DFE 1-gen-2018 Bandiziol, A.; Grollitsch, W.; Steffan, G.; Nonis, R.; Palestri, P.
Modeling, design and characterization of a new Low Jitter analog Dual Tuning LC-VCO PLL Architecture 1-gen-2005 Nonis, Roberto; DA DALT, N; Palestri, Pierpaolo; Selmi, Luca
Modeling, Design and Characterization of a new low Jitter Analog Dual Tuning LC-VCO PLL Architecture 1-gen-2004 Nonis, Roberto; DA DALT, N; Palestri, Pierpaolo; Selmi, Luca
Phase Noise Modelling in Phase Locked Loop Frequency Synthesizer 1-gen-2002 Nonis, Roberto; Palestri, Pierpaolo; DA DALT, N; Selmi, Luca