This paper presents a new model for the frequency of oscillation, the oscillation amplitude and the phase-noise of ring oscillators consisting of MOS-current-mode-logic delay cells. The numerical model has been validated through circuit simulations of oscillators designed with a typical 130 nm CMOS technology. A design flow based on the proposed model and on circuit simulations is presented and applied to cells with active loads. The choice of the cell parameters that minimize phase-noise and power consumption is addressed.

A numerical model for the oscillation frequency, the amplitude and the phase-noise of MOS-current-mode-logic ring oscillators

NOCENTE, Michele;PALESTRI, Pierpaolo;NONIS, Roberto;ESSENI, David;SELMI, Luca
2010

Abstract

This paper presents a new model for the frequency of oscillation, the oscillation amplitude and the phase-noise of ring oscillators consisting of MOS-current-mode-logic delay cells. The numerical model has been validated through circuit simulations of oscillators designed with a typical 130 nm CMOS technology. A design flow based on the proposed model and on circuit simulations is presented and applied to cells with active loads. The choice of the cell parameters that minimize phase-noise and power consumption is addressed.
File in questo prodotto:
File Dimensione Formato  
Nocente_2010.pdf

non disponibili

Tipologia: Documento in Post-print
Licenza: Non pubblico
Dimensione 196.7 kB
Formato Adobe PDF
196.7 kB Adobe PDF   Visualizza/Apri   Richiedi una copia

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11390/878189
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo

Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 8
  • ???jsp.display-item.citation.isi??? 7
social impact