Pushing the Boundary of the 48 V Data Center Power Conversion in the AI and IoT Era

The increasing interest in cloud-based services, the Internet-of-Things and the take-over of artificial intelligence computing require constant improvement of the power distribution network. Electricity consumption of data centers, which drains a consistent slice of modern world energy production, is projected to increase tremendously during the next decade. Data centers are the backbone of modern economy; as a consequence, energy-aware resource allocation heuristics are constantly researched, leading the major IT services providers to develop new power conversion architectures to increase the overall webfarm distribution efficiency, together reducing the resulting carbon footprint and maximizing their investments. As higher voltage distribution yields lower conduction losses, vendors are moving from the 12 V rack bus to 48 V solutions together with research centers and especially data center developers. As mentioned, efficiency is crucial to address in this scenario and the whole conversion chain, i.e. from the 48 V bus to the CPU/GPU/ASIC voltage, must be optimized to decrease wasted energy inside the server rack. Power density for this converters family is also paramount to consider, as the overall system must occupy as less area and volume as possible. LLC resonant converters are commonly used as IBCs (intermediate bus converters), together with their GaN implementations because of their multiple advantages in efficiency and size, while multiphase-buck-derived topologies are the most common solution to step-down-to and regulate the final processor voltage as they're well-know, easy to scale and design. This dissertation proposes a family of non-isolated, innovative converters capable of increasing the power density and the efficiency of the state-of-the-art 48 V to 1.8/0.9 V conversion. In this work three solutions are proposed, which can be combined or used as stand-alone converters: an ASIC on-chip switched-capacitor resonant voltage divider, two unregulated Google-STC-derived topologies for the IBC stage (48 V to 12 V and 48 V to 4.8 V + 10.6 V dual-output) and a complete 48 V to 1.8 V ultra-dense PoL converter. Each block has been thoroughly tested and researched, therefore mathematical and experimental results are provided for each solution, together with state-of-the-art comparisons and contextualization.