Non-Volatile Reconfigurable Transistor via Ferroelectric Modulation: Fabrication Strategy and TCAD Simulations

The demand for hardware platforms that can enable an efficient execution of artificial intelligence algorithms is on the rise. As the logic-memory separation in the von Neumann architecture is responsible for a large part of the energy consumption and latency, in-memory computing and neuromorphic computing are emerging as promising paradigms to reduce power consumption and delay thanks to the co-localization of processing and memory functionalities. It has been shown that Schottkyjunction devices can be used to realize versatile transistors, able to be reconfigured at run-time between n- and p-type behavior, without the need of doping. The addition of a ferroelectric gate can be exploited to tune the Schottky barrier in a non-volatile manner, effectively realizing logic devices whose behavior can be influenced by the ferroelectric remnant polarization, merging logic and memory functionalities. In this work we present an optimized fabrication scheme that allows for the fabrication of ferroelectrically-tuned Schottky-junction devices with improved TiN gate structures. Furthermore, to better understand the device behavior, we present TCAD simulations calibrated on fabricated structures.