The trade-off between gate length (Lgate), flicker noise and powder consumption in Low-Noise-Amplifiers (LNA) designed with 45nm FinFETs (FFs) has been investigated, in order to draw new design guidelines for this novel technology. The simulation results highlight the existence of an optimum Lgate which reduces the impact of flicker noise at minimum power consumption.

Design strategies for SOI FinFET Low-Noise Amplifiers: dealing with Flicker Noise

PONTON, Davide;PALESTRI, Pierpaolo;
2009-01-01

Abstract

The trade-off between gate length (Lgate), flicker noise and powder consumption in Low-Noise-Amplifiers (LNA) designed with 45nm FinFETs (FFs) has been investigated, in order to draw new design guidelines for this novel technology. The simulation results highlight the existence of an optimum Lgate which reduces the impact of flicker noise at minimum power consumption.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11390/693631
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