| Nome |
# |
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Digital and analog TFET circuits: Design and benchmark, file e27ce0c5-7289-055e-e053-6605fe0a7873
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530
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DFT study of graphene doping due to metal contacts, file e27ce0c7-3dca-055e-e053-6605fe0a7873
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304
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A TCAD-Based Methodology to Model the Site-Binding Charge at ISFET/Electrolyte Interfaces, file e27ce0c2-4af9-055e-e053-6605fe0a7873
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279
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Neuromorphic object localization using resistive memories and ultrasonic transducers, file 0cd2849f-6b37-40d2-84c7-808c3a29663e
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246
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Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain, file e27ce0c2-6573-055e-e053-6605fe0a7873
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216
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Revisiting piezoelectric FETs with sub-thermal swing, file e27ce0c5-0e8a-055e-e053-6605fe0a7873
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200
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Universal analytic model for tunnel FET circuit simulation, file e27ce0c9-5704-055e-e053-6605fe0a7873
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170
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Comprehensive comparison and experimental validation of band-structure calculation methods in III–V semiconductor quantum wells, file e27ce0c2-6742-055e-e053-6605fe0a7873
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167
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Engineering of metal-MoS2 contacts to overcome Fermi level pinning, file e27ce0ca-1fca-055e-e053-6605fe0a7873
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156
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Stabilization of negative capacitance in ferroelectric capacitors with and without a metal interlayer, file e27ce0c7-4ba7-055e-e053-6605fe0a7873
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132
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Understanding the Potential and Limitations of Tunnel FETs for Low-Voltage Analog/Mixed-Signal Circuits, file e27ce0c3-b9d3-055e-e053-6605fe0a7873
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125
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Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits, file e27ce0c2-bdc1-055e-e053-6605fe0a7873
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95
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Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs, file e27ce0c5-13f2-055e-e053-6605fe0a7873
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92
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A review of selected topics in physics based modeling for tunnel field-effect transistors, file e27ce0c7-9c21-055e-e053-6605fe0a7873
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92
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Piezoresistive Properties of Suspended Graphene Membranes under Uniaxial and Biaxial Strain in Nanoelectromechanical Pressure Sensors, file e27ce0c3-6747-055e-e053-6605fe0a7873
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79
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Strain induced mobility modulation in single-layer MoS2, file e27ce0c2-6444-055e-e053-6605fe0a7873
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66
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Optimization of GaAs/AlGaAs staircase avalanche photodiodes accounting for both electron and hole impact ionization, file e27ce0c7-881d-055e-e053-6605fe0a7873
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57
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Simulation study of Fermi level depinning in metal-MoS2 contacts, file e27ce0c9-fffd-055e-e053-6605fe0a7873
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52
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Limitations to Electrical Probing of Spontaneous Polarization in Ferroelectric-Dielectric Heterostructures, file 861f71f1-538a-4ebe-8d67-21d35dcbfec5
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51
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Quasi-Ballistic Gamma - and L-Valleys Transport in Ultrathin Body Strained (111) GaAs nMOSFETs, file e27ce0c3-2751-055e-e053-6605fe0a7873
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51
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Improved understanding of metal–graphene contacts, file e27ce0c7-a0b8-055e-e053-6605fe0a7873
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51
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Benchmarking of 3-D MOSFET Architectures: Focus on the Impact of Surface Roughness and Self-Heating, file e27ce0c7-8462-055e-e053-6605fe0a7873
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47
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Strain-Induced Modulation of Electron Mobility in Single-Layer Transition Metal Dichalcogenides MX2 (M = Mo, W; X = S, Se), file e27ce0c9-9039-055e-e053-6605fe0a7873
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45
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Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells, file e27ce0c2-0f40-055e-e053-6605fe0a7873
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42
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Modelling and design of FTJs as multi-level low energy memristors for neuromorphic computing, file e27ce0ca-231b-055e-e053-6605fe0a7873
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42
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Ohmic Behavior in Metal Contacts to n/p-Type Transition-Metal Dichalcogenides: Schottky versus Tunneling Barrier Trade-off, file 95ea89c1-f9b8-4c1f-b091-89208f7bd878
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35
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Modeling Approaches for Gain, Noise and Time Response of Avalanche Photodiodes for X-Rays Detection, file 38fab7b4-6378-4854-8834-9f639e0edb72
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32
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Operation and Design of Ferroelectric FETs for a BEOL Compatible Device Implementation, file 14ab653e-692e-4ebf-b82d-60c0eb88e259
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31
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Monte-Carlo Simulation of Decananometric nMOSFETs: Multi-Subband vs. 3D-Electron Gas with Quantum Corrections, file e27ce0c1-eb46-055e-e053-6605fe0a7873
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27
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On the experimental determination of channel back-scattering in nanoMOSFETs, file e27ce0c1-dfab-055e-e053-6605fe0a7873
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24
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Ferroelectric based FETs and synaptic devices for highly energy efficient computational technologies, file e27ce0ca-1ac2-055e-e053-6605fe0a7873
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23
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Dependable Contact Related Parameter Extraction in Graphene–Metal Junctions, file e27ce0c9-0ea1-055e-e053-6605fe0a7873
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21
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Versatile experimental setup for FTJ characterization, file fe298a81-a2e9-4244-be08-9d8b974e6b95
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18
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Analytical Procedure for the Extraction of Material Parameters in Antiferroelectric ZrO2, file 3dbffaf6-b8c2-47df-bfcb-5e55eab37313
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16
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Modeling Nanoscale III–V Channel MOSFETs with the Self-Consistent Multi-Valley/Multi-Subband Monte Carlo Approach, file e27ce0ca-112d-055e-e053-6605fe0a7873
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16
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Improved surface-roughness scattering and mobility models for multi-gate FETs with arbitrary cross-section and biasing scheme, file 6da2e71f-d1a0-48ff-b806-b36d40a256f3
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15
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Modelling and design of FTJs as high reading-impedance synaptic devices, file e27ce0ca-1e9e-055e-e053-6605fe0a7873
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15
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Interplay between charge trapping and polarization switching in BEOL-compatible bilayer Ferroelectric Tunnel Junctions, file ef9053c6-5494-4aa0-ae65-15741f7be2ae
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15
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Novel experimental methodologies to reconcile large- and small-signal responses of Hafnium-based Ferroelectric Tunnel Junctions, file 3c9fe524-f4f9-4893-9276-18e2d082ef58
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14
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Performance comparison for FinFETs, nanowire and stacked nanowires FETs: Focus on the influence of surface roughness and thermal effects, file e27ce0c5-06f3-055e-e053-6605fe0a7873
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13
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Bridging Large-Signal and Small-Signal Responses of Hafnium-Based Ferroelectric Tunnel Junctions, file 8313ba19-a940-419c-a6b8-50d4118ccbd3
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12
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New device concepts, transistor architectures and materials for high performance and energy efficient CMOS circuits in the forthcoming era of 3D integrated circuits, file e27ce0c5-4332-055e-e053-6605fe0a7873
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12
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Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain, file e27ce0c7-ac04-055e-e053-6605fe0a7873
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9
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Two-Dimensional Heterojunction Interlayer Tunneling Field Effect Transistors (Thin-TFETs), file e27ce0c9-6e6d-055e-e053-6605fe0a7873
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9
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An Improved Surface Roughness Scattering Model for Bulk, Thin-Body, and Quantum-Well MOSFETs, file e27ce0c2-b4ee-055e-e053-6605fe0a7873
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8
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Performance Projection of III-V Ultra-Thin-Body, FinFET, and Nanowire MOSFETs for two Next-Generation Technology Nodes, file e27ce0c3-67b3-055e-e053-6605fe0a7873
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8
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Versatile experimental setup for FTJ characterization, file 6f1cc34b-6dcc-4bdb-a68f-fae8d4b72f54
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7
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Operation and Design of Ferroelectric FETs for a BEOL Compatible Device Implementation, file 8518144b-7b25-47f1-b5f1-b9fbf8238f39
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7
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A study of metal-MoS2 contacts by using an in-house developed ab-initio transport simulator, file 8800e456-7675-4330-9b1b-3ce1bf6b5f77
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7
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Benchmarking of 3-D MOSFET Architectures: Focus on the Impact of Surface Roughness and Self-Heating, file e27ce0c5-7d72-055e-e053-6605fe0a7873
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7
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Two-Dimensional Heterojunction Interlayer Tunneling Field Effect Transistors (Thin-TFETs), file e27ce0c2-0881-055e-e053-6605fe0a7873
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6
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Surface roughness limited mobility in multi-gate FETs with arbitrary cross-section, file e27ce0c3-6a55-055e-e053-6605fe0a7873
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6
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Improved surface-roughness scattering and mobility models for multi-gate FETs with arbitrary cross-section and biasing scheme, file 009481f1-8a74-42b0-8c24-715c47952471
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5
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Comprehensive Analysis of Graphene Geometric Diodes: Role of Geometrical Asymmetry and Electrostatic Effects, file 6dbf01f5-7a3b-4b01-8809-6d7e3350d478
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5
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Optimizing the Number of Steps and the Noise in Staircase APDs with Ternary III - V Semiconductor Alloys, file e27ce0c7-718b-055e-e053-6605fe0a7873
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5
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Polarization switching and interface charges in BEOL compatible Ferroelectric Tunnel Junctions, file e27ce0ca-16a6-055e-e053-6605fe0a7873
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5
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Limitations to Electrical Probing of Spontaneous Polarization in Ferroelectric-Dielectric Heterostructures, file f0971387-fa0f-48b1-8f91-dc609bb32fc1
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5
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Accurate Nonlocal Impact Ionization Models for Conventional and Staircase Avalanche Photodiodes Derived by Full Band Monte Carlo Transport Simulations, file 1c4ec198-68f0-4024-844f-21aa7dc00848
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4
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Versatile experimental setup for FTJ characterization, file 8bd1ed50-9c64-4af9-87db-b8b3e5d31c57
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4
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Polarization switching and interface charges in BEOL compatible Ferroelectric Tunnel Junctions, file 9165c003-37a7-45fd-a48e-64177fa80d34
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4
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Polarization switching and AC small-signal capacitance in Ferroelectric Tunnel Junctions, file d96dc4c8-fd99-45c4-a2c7-b8906b8190e4
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4
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Surface roughness limited mobility modeling in ultra-thin SOI and quantum well III-V MOSFETs, file e27ce0c1-ee08-055e-e053-6605fe0a7873
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4
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Performance Benchmarking and Effective Channel Length for Nanoscale InAs, In0.53Ga0.47As, and sSi n-MOSFETs, file e27ce0c1-ef1e-055e-e053-6605fe0a7873
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4
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A new formulation for surface roughness limited mobility in bulk and ultra-thin-body metal–oxide–semiconductor transistors, file e27ce0c1-f1a5-055e-e053-6605fe0a7873
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4
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On the extraction of the channel current in permeable gate oxide MOSFETs, file e27ce0c1-f3dc-055e-e053-6605fe0a7873
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4
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Improved surface roughness modeling and mobility projections in thin film MOSFETs, file e27ce0c2-4191-055e-e053-6605fe0a7873
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4
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Physics-based TCAD analysis of Border and Interface traps in Al2O3/InGaAs stacks using Multifrequency CV-curves, file e27ce0c5-3004-055e-e053-6605fe0a7873
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4
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Improved understanding of metal–graphene contacts, file e27ce0c6-4bcc-055e-e053-6605fe0a7873
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4
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Engineering of metal-MoS2 contacts to overcome Fermi level pinning, file e27ce0ca-1fc9-055e-e053-6605fe0a7873
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4
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Polarization switching and AC small-signal capacitance in Ferroelectric Tunnel Junctions, file 08523866-1bcf-44d6-a507-ab157f9bc4f0
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3
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Charge-Trapping-Induced Compensation of the Ferroelectric Polarization in FTJs: Optimal Conditions for a Synaptic Device Operation, file 0c1b9b43-deda-47d7-a111-1de8184251ce
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3
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Novel experimental methodologies to reconcile large- and small-signal responses of Hafnium-based Ferroelectric Tunnel Junctions, file 116680b6-f870-4078-b0d5-7538286fe93d
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3
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Polarization switching and AC small-signal capacitance in Ferroelectric Tunnel Junctions, file 77ef5481-7630-4d5a-afe2-caaef07e1e92
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3
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Analytical Procedure for the Extraction of Material Parameters in Antiferroelectric ZrO2, file 944fa674-cd2b-4561-8d18-0ade0c4de603
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3
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Bridging Large-Signal and Small-Signal Responses of Hafnium-Based Ferroelectric Tunnel Junctions, file e1a56e25-75d9-4a6f-91b8-3d866e667931
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3
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New design perspective for Ferroelectric NC-FETs, file e27ce0c4-fc97-055e-e053-6605fe0a7873
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3
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Quantum transport models based on NEGF and empirical pseudopotentials for accurate modeling of nanoscale electron devices, file e27ce0c7-9bf3-055e-e053-6605fe0a7873
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3
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Full-Band Monte Carlo simulations of GaAs p-i-n Avalanche PhotoDiodes: What Are the Limits of Nonlocal Impact Ionization Models?, file e27ce0c8-ef10-055e-e053-6605fe0a7873
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3
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Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits, file e27ce0c9-6d86-055e-e053-6605fe0a7873
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3
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Editorial: Letters from the 8th Joint International EUROSOI workshop and International Conference on Ultimate Integration on Silicon, file e27ce0c9-f183-055e-e053-6605fe0a7873
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3
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Ferroelectric based FETs and synaptic devices for highly energy efficient computational technologies, file e27ce0c9-ffff-055e-e053-6605fe0a7873
|
3
|
|
Polarization switching and interface charges in BEOL compatible Ferroelectric Tunnel Junctions, file 4dfc66f3-c6b2-4e82-b47a-64f166ef5442
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2
|
|
Interplay between charge trapping and polarization switching in BEOL-compatible bilayer Ferroelectric Tunnel Junctions, file 64eb10f2-f77e-44a3-8af8-b7826f7b627e
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2
|
|
Bridging Large-Signal and Small-Signal Responses of Hafnium-Based Ferroelectric Tunnel Junctions, file 8d5e4371-97b9-48de-a602-74432bf25d7c
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2
|
|
Bridging Large-Signal and Small-Signal Responses of Hafnium-Based Ferroelectric Tunnel Junctions, file 8d893882-f429-4fb6-bf32-5c96478d1e09
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2
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|
Simulation analysis of III-V n-MOSFETs: channel materials, Fermi level pinning and biaxial strain, file e27ce0c1-c819-055e-e053-6605fe0a7873
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2
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Analysis of the Performance of n-Type FinFETs With Strained SiGe Channel, file e27ce0c1-e00a-055e-e053-6605fe0a7873
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2
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The impact of interface states on the mobility and the drive current of III-V MOSFETs, file e27ce0c1-ef17-055e-e053-6605fe0a7873
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2
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Simulation of DC and RF Performance of the Graphene Base Transistor, file e27ce0c1-f230-055e-e053-6605fe0a7873
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2
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Performance of III-V nanoscale MOSFETs: a simulation study, file e27ce0c1-f598-055e-e053-6605fe0a7873
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2
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Modelling nanoscale n-MOSFETs with III-V compound semiconductor channels: from advanced models for band structures, electrostatics and transport to TCAD, file e27ce0c4-f282-055e-e053-6605fe0a7873
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2
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NEGF based transport modelling with a full-band, pseudopotential Hamiltonian: Theory, implementation and full device simulations, file e27ce0c5-079c-055e-e053-6605fe0a7873
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2
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|
Revised Analysis of Design Options and Minimum Subthreshold Swing in Piezoelectric FinFETs, file e27ce0c5-079e-055e-e053-6605fe0a7873
|
2
|
|
Modeling of Field-Effect-Transistors with Strained and Alternative Channel Materials, file e27ce0c5-5d46-055e-e053-6605fe0a7873
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2
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Full-band quantum simulation of electron devices with the pseudopotential method: Theory, implementation, and applications, file e27ce0c5-674b-055e-e053-6605fe0a7873
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2
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Influence of interface traps on ferroelectric NC-FETs, file e27ce0c5-8bdb-055e-e053-6605fe0a7873
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2
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Modelling and design of Ferroelectric NC-FETs, file e27ce0c5-8bdd-055e-e053-6605fe0a7873
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2
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An MoS 2 -Based Piezoelectric FET: A Computational Study of Material Properties and Device Design, file e27ce0c6-408b-055e-e053-6605fe0a7873
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2
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Accurate and Efficient Dynamic Simulations of Ferroelectric Based Electron Devices, file e27ce0c7-41d7-055e-e053-6605fe0a7873
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2
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Large temperature coefficient of resistance in atomically thin two-dimensional semiconductors, file e27ce0c9-2635-055e-e053-6605fe0a7873
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2
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| Totale |
3.947 |