ESSENI, David
 Distribuzione geografica
Continente #
NA - Nord America 29.368
AS - Asia 10.296
EU - Europa 7.570
SA - Sud America 1.906
AF - Africa 270
Continente sconosciuto - Info sul continente non disponibili 19
OC - Oceania 6
AN - Antartide 1
Totale 49.436
Nazione #
US - Stati Uniti d'America 28.999
SG - Singapore 4.972
CN - Cina 2.140
UA - Ucraina 1.720
IT - Italia 1.509
BR - Brasile 1.495
DE - Germania 1.216
HK - Hong Kong 1.028
VN - Vietnam 825
FI - Finlandia 660
RU - Federazione Russa 581
FR - Francia 488
IE - Irlanda 351
SE - Svezia 292
IN - India 255
TR - Turchia 229
GB - Regno Unito 222
CA - Canada 213
AR - Argentina 145
BD - Bangladesh 131
KR - Corea 114
NL - Olanda 93
AT - Austria 91
MX - Messico 91
IQ - Iraq 89
ZA - Sudafrica 82
JP - Giappone 80
EC - Ecuador 65
PL - Polonia 63
ID - Indonesia 56
CO - Colombia 53
PK - Pakistan 53
BE - Belgio 50
ES - Italia 50
VE - Venezuela 42
MA - Marocco 41
PH - Filippine 41
SA - Arabia Saudita 38
CL - Cile 34
CH - Svizzera 33
UZ - Uzbekistan 31
TN - Tunisia 27
PY - Paraguay 26
TW - Taiwan 26
LT - Lituania 24
JO - Giordania 23
KE - Kenya 23
CZ - Repubblica Ceca 21
BO - Bolivia 19
TG - Togo 19
MY - Malesia 18
DO - Repubblica Dominicana 14
DZ - Algeria 14
EG - Egitto 14
GR - Grecia 14
AZ - Azerbaigian 13
EU - Europa 13
UY - Uruguay 13
AE - Emirati Arabi Uniti 12
JM - Giamaica 12
PE - Perù 12
IL - Israele 11
OM - Oman 11
BG - Bulgaria 10
KZ - Kazakistan 10
RO - Romania 10
CI - Costa d'Avorio 9
CR - Costa Rica 9
NP - Nepal 9
PS - Palestinian Territory 9
RS - Serbia 9
AL - Albania 8
IR - Iran 8
MD - Moldavia 8
TH - Thailandia 8
AO - Angola 7
DK - Danimarca 7
GE - Georgia 7
PA - Panama 7
TT - Trinidad e Tobago 7
AM - Armenia 6
HU - Ungheria 6
KG - Kirghizistan 6
LB - Libano 6
BH - Bahrain 5
HR - Croazia 5
LV - Lettonia 5
PT - Portogallo 5
SN - Senegal 5
XK - ???statistics.table.value.countryCode.XK??? 5
ET - Etiopia 4
HN - Honduras 4
LK - Sri Lanka 4
NI - Nicaragua 4
NO - Norvegia 4
SK - Slovacchia (Repubblica Slovacca) 4
SY - Repubblica araba siriana 4
BN - Brunei Darussalam 3
CG - Congo 3
EE - Estonia 3
Totale 49.373
Città #
Woodbridge 3.528
Fairfield 3.228
Ashburn 2.150
Houston 2.132
Ann Arbor 2.067
Singapore 1.908
Seattle 1.292
Chandler 1.259
Wilmington 1.201
Jacksonville 1.137
Cambridge 1.077
Beijing 1.039
Hong Kong 1.017
San Jose 758
Dearborn 706
Udine 579
Boardman 479
Dublin 330
Princeton 326
Lauterbourg 322
Los Angeles 305
Council Bluffs 298
Ho Chi Minh City 245
Buffalo 204
Munich 196
Dallas 189
Hanoi 178
Izmir 170
Hefei 166
San Diego 158
New York 155
Santa Clara 137
São Paulo 133
Helsinki 109
Redondo Beach 109
Seoul 98
The Dalles 95
Ottawa 91
Ogden 86
Des Moines 80
Milan 77
Norwalk 68
Orem 68
Tokyo 64
East Aurora 61
Frankfurt am Main 61
Nanjing 61
Atlanta 56
Düsseldorf 53
Vienna 52
Warsaw 52
Grafing 51
Rio de Janeiro 49
Trieste 49
Brussels 46
Amsterdam 44
Mumbai 44
Brooklyn 43
Kunming 43
Chennai 41
Johannesburg 41
Montreal 40
Nuremberg 40
Bologna 38
Da Nang 38
Haiphong 36
Stockholm 35
Chicago 34
Modena 34
Phoenix 34
Denver 33
Guangzhou 33
Simi Valley 32
Belo Horizonte 30
Boston 29
London 29
Poplar 29
Redmond 29
Palaiseau 28
San Francisco 28
Baghdad 27
Brasília 27
Dhaka 27
Dong Ket 27
Shanghai 27
Toronto 27
Mexico City 24
Tashkent 24
Codroipo 23
Indiana 23
San Michele al Tagliamento 23
Falls Church 22
Guayaquil 22
Nairobi 22
Rome 22
Biên Hòa 21
Cervignano Del Friuli 21
Jinan 21
Salvador 21
Campinas 20
Totale 31.961
Nome #
Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells 1.667
A TCAD-Based Methodology to Model the Site-Binding Charge at ISFET/Electrolyte Interfaces 270
Revised analysis of negative capacitance in ferroelectric-insulator capacitors: analytical and numerical results, physical insight, comparison to experiments 253
Improved surface roughness modeling and mobility projections in thin film MOSFETs 239
Stabilization of negative capacitance in ferroelectric capacitors with and without a metal interlayer 236
A better understanding of the low-field mobility in Graphene Nano-ribbons 227
A New and Flexible Scheme for Hot-Electron Programming of Non-Volatile Memory Cells 224
A review of selected topics in physics based modeling for tunnel field-effect transistors 224
Essential Physics of the OFF-State Current in Nanoscale MOSFETs and Tunnel FETs 216
New device concepts, transistor architectures and materials for high performance and energy efficient CMOS circuits in the forthcoming era of 3D integrated circuits 214
State-of-the-art semi-classical Monte Carlo method for carrier transport in nanoscale transistors 212
Scaled vertical-nanowire heterojunction tunnelling transistors with extreme quantum confinement 207
Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain 207
Design options for hetero-junction tunnel FETs with high on current and steep sub-threshold voltage slope 206
A computational study of van der Waals tunnel transistors: fundamental aspects and design challenges 206
An Experimental Study of Low Field Electron Mobility in Double-Gate, Ultra-Thin SOI MOSFETs 203
Drain Current Improvements in Uniaxially Strained p-MOSFETs: a Multi-Subband Monte Carlo Study 202
Performance Projection of III-V Ultra-Thin-Body, FinFET, and Nanowire MOSFETs for two Next-Generation Technology Nodes 201
A better understanding of the requirements for predictive modeling of strain engineering in nMOS transistors 200
Electromechanical Piezoresistive Sensing in Suspended Graphene Membranes 199
Early assessment of tunnel-FET for energy-efficient logic circuits 197
Basic Insight about the Strain Engineering of n-type FinFETS 195
Failure of the Scalar Dielectric Function Approach for the Screening Modeling in Double-Gate SOI MOSFETs and in FinFETs 195
A Multi-Subband Monte Carlo study of electron transport in strained SiGe n-type FinFETs 194
3D-FBK pixelsensors:Recent beam tests results with irradiated devices 193
Comprehensive comparison and experimental validation of band-structure calculation methods in III–V semiconductor quantum wells 193
New design perspective for Ferroelectric NC-FETs 192
A New Model for the Backscatter Coefficient in Nanoscale MOSFETs 190
Simulation analysis of III-V n-MOSFETs: channel materials, Fermi level pinning and biaxial strain 190
Analysis of the Performance of n-Type FinFETs With Strained SiGe Channel 189
Comparison between Pseudospectral and Discrete Geometric Methods for Modelling Quantization Effects in Nanoscale Electron Devices 188
DFT study of graphene doping due to metal contacts 188
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits 188
Universal analytic model for tunnel FET circuit simulation 187
Understanding the Potential and Limitations of Tunnel FETs for Low-Voltage Analog/Mixed-Signal Circuits 187
Influence of interface traps on ferroelectric NC-FETs 187
An Improved Surface Roughness Scattering Model for Bulk, Thin-Body, and Quantum-Well MOSFETs 187
"A Novel Method to Characterize Parasitic Capacitances in MOSFET's" 185
"Characterization of Polysilicon-Gate Depletion in MOS Structures" 185
Models for the use of commercial TCAD in the analysis of silicon-based integrated biosensors 185
Discrete Geometric Approach for Modelling Quantization Effects in Nanoscale Electron Devices 185
Experimental characterization of the vertical position of the trapped charge in Si nitride-based nonvolatile memory cells 185
An exact solution of the linearized Boltzmann transport equation and its application to mobility calculations in graphene bilayers 184
"Hot-Carrier-Induced Alterations of MOSFET Capacitances: A Quantitative Monitor for Electrical Degradation" 184
NEGF based transport modelling with a full-band, pseudopotential Hamiltonian: Theory, implementation and full device simulations 183
Full-Band Quantization Analysis Reveals a Third Valley in Silicon Inversion Layers 182
Surface roughness limited mobility in multi-gate FETs with arbitrary cross-section 182
Revisiting piezoelectric FETs with sub-thermal swing 182
Pseudo-spectral methods for the efficient simulation of quantization effects in nanoscale MOS transistors 181
An improved procedure to extract the limiting carrier velocity in ultra scaled CMOS devices 181
On the origin of the mobility reduction in n- and p-metal-oxide-semiconductor field effect transistors with hafnium-based/metal gate stacks 181
Two-Dimensional Heterojunction Interlayer Tunneling Field Effect Transistors (Thin-TFETs) 180
A Quantitative Error Analysis of the Mobility Extraction According to the Matthiessen Rule in Advanced MOS Transistors 178
Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs 178
A comparison of advanced transport models for the computation of the drain current in nanoscale nMOSFETs 177
On the Surface-Roughness Scattering in Biaxially Strained n- and p-MOS Transistors 176
Multi-Subband Monte-Carlo study of Transport, Quantization and Electron Gas Degeneration in Ultra-Thin SOI n-MOSFETs 176
Supersteep Retrograde Doping in Ferroelectric MOSFETs for sub-60mV/dec Subthreshold Swing 176
Simulation of nano-biosensors based on conventional TCAD 175
Piezoresistive Properties of Suspended Graphene Membranes under Uniaxial and Biaxial Strain in Nanoelectromechanical Pressure Sensors 175
Mobility Enhancement in Strained n-FinFETs: Basic Insight and Stress Engineering 175
"A Better Understanding of Substrate Enhanced Gate Current in VLSI MOSFET's and Flash Cells - Part II: Physical Analysis 174
Comparison of Semiclassical Transport Formulations Including Quantum Corrections for Advanced Devices with High-K Gate Stacks 174
Improved understanding of metal–graphene contacts 173
On the experimental determination of channel back-scattering in nanoMOSFETs 172
Surface-Roughness-Induced Variability in Nanowire InAs Tunnel FETs 172
The impact of interface states on the mobility and the drive current of III-V MOSFETs 172
On the role of Coulomb scattering in hafnium-silicate gated silicon n and p-channel metal-oxide-semiconductor-field-effect-transistors 172
Toward computationally efficient Multi-Subband Monte Carlo simulations of nanoscale MOSFETs 171
Device-circuit co-design and comparison of ultra-low voltage Tunnel-FET and CMOS digital circuits 171
Performance comparison for FinFETs, nanowire and stacked nanowires FETs: Focus on the influence of surface roughness and thermal effects 170
Simulation of DC and RF Performance of the Graphene Base Transistor 169
Modeling of Field-Effect-Transistors with Strained and Alternative Channel Materials 169
Improved surface-roughness scattering and mobility models for multi-gate FETs with arbitrary cross-section and biasing scheme 168
Extraction of h parameter characterising ueff against Eeff curves in strained Si nMOS devices 167
A new analytical model for the energy dispersion in two-dimensional hole inversion layers 167
Revised Analysis of Design Options and Minimum Subthreshold Swing in Piezoelectric FinFETs 167
Experimental and Simulation Analysis of Program/Retention Transients in Silicon Nitride-Based NVM Cells 166
Modeling approaches for band-structure calculation in III-V FET quantum wells 166
Quasi-Ballistic Gamma - and L-Valleys Transport in Ultrathin Body Strained (111) GaAs nMOSFETs 166
Benchmarking of 3-D MOSFET Architectures: Focus on the Impact of Surface Roughness and Self-Heating 166
Low-voltage high-performance III-V semiconductor MOSFETs for advanced CMOS nodes: impact of strain and interface traps 166
A simulation study of strain induced performance enhancements in InAs nanowire Tunnel-FETs 165
Strain-Induced Performance Improvements in InAs Nanowire Tunnel FETs 165
Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits 165
Performance Study of Strained III-V Materials for Ultra-Thin Body Transistor Applications 165
Drain current improvements in uniaxially strained p-MOSFETs: A Multi-Subband Monte Carlo study 165
Multi-scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility 164
Theory of Motion at the band crossing points in bulk semiconductor crystals and in inversion layers 163
Modeling and Simulation Approaches for Drain Current Computation 162
Technology Computer Aided Design 161
An improved empirical approach to introduce quantization effects in the transport direction in multi-subband Monte Carlo simulations 161
Explanation of SILC probability density distributions with nonuniform generation of traps in the tunnel oxide of flash memory arrays 161
Performance analysis of different SRAM cell topologies employing tunnel-FETs 161
Characterization and Modeling of long term retention in SONOS Non Volatile Memories 160
Semi-classical transport modelling of CMOS transistors with arbitrary crystal orientations and strain engineering 159
Interpretation of graphene mobility data by means of a semiclassical Monte Carlo transport model 159
A new Statistical Model to extract the Stress Induced Oxide Trap number and the Probability Density Distribution of the Gate Current Produced by a Single Trap 158
Tunnel FETsfor Ultra-Low Voltage Digital VLSI Circuits: Part I - Device-Circuit Interaction and Evaluation at Device Level 158
Experimental Characterization of Statistically Independent Defects in Gate Dielectrics - Part I: Description and Validation of the Model 158
Totale 19.852
Categoria #
all - tutte 172.223
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 172.223


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021226 0 0 0 0 0 0 0 0 0 0 0 226
2021/20222.779 159 229 102 147 41 179 208 122 39 497 645 411
2022/20232.915 362 291 53 401 217 744 9 205 356 38 102 137
2023/20241.141 143 78 77 29 140 107 70 91 133 60 29 184
2024/20258.183 1.477 604 375 149 202 389 498 433 694 632 915 1.815
2025/202612.236 840 1.396 1.135 1.390 2.061 923 1.372 387 860 1.002 675 195
Totale 50.088