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EnglishLayered 2-D crystals embrace unique features of atomically thin bodies, dangling bond free interfaces, and step-like 2-D density of states. To exploit these features for the design of a steep slope transistor, we propose a Two-dimensional heterojunction interlayer tunneling field effect transistor (Thin- TFET), where a steep subthreshold swing (SS) of ∼14 mV/dec and a high on-current of ∼300 μA/μm are estimated theoretically. The SS is ultimately limited by the density of states broadening at the band edges and the on-current density is estimated based on the interlayer charge transfer time measured in recent experimental studies. To minimize supply voltage VDD while simultaneously maximizing on currents, Thin-TFETs are best realized in heterostructures with near broken gap energy band alignment. Using the WSe2/SnSe2 stacked-monolayer heterostructure, a model material system with desired properties for Thin-TFETs, the performance of both n-type and p-type Thin-TFETs is theoretically evaluated. Nonideal effects such as a nonuniform van der Waals gap thickness between the two 2-D semiconductors and finite total access resistance are also studied. Finally, we present a benchmark study for digital applications, showing the Thin-TFETs may outperform CMOS and III–V TFETs in term of both switching speed and energy consumption at low-supply voltages.
| Titolo: | Two-Dimensional Heterojunction Interlayer Tunneling Field Effect Transistors (Thin-TFETs) |
| Autori: | |
| Data di pubblicazione: | 2015 |
| Rivista: | |
| Abstract: | Layered 2-D crystals embrace unique features of atomically thin bodies, dangling bond free interfaces, and step-like 2-D density of states. To exploit these features for the design of a steep slope transistor, we propose a Two-dimensional heterojunction interlayer tunneling field effect transistor (Thin- TFET), where a steep subthreshold swing (SS) of ∼14 mV/dec and a high on-current of ∼300 μA/μm are estimated theoretically. The SS is ultimately limited by the density of states broadening at the band edges and the on-current density is estimated based on the interlayer charge transfer time measured in recent experimental studies. To minimize supply voltage VDD while simultaneously maximizing on currents, Thin-TFETs are best realized in heterostructures with near broken gap energy band alignment. Using the WSe2/SnSe2 stacked-monolayer heterostructure, a model material system with desired properties for Thin-TFETs, the performance of both n-type and p-type Thin-TFETs is theoretically evaluated. Nonideal effects such as a nonuniform van der Waals gap thickness between the two 2-D semiconductors and finite total access resistance are also studied. Finally, we present a benchmark study for digital applications, showing the Thin-TFETs may outperform CMOS and III–V TFETs in term of both switching speed and energy consumption at low-supply voltages. |
| Handle: | http://hdl.handle.net/11390/1064835 |
| Appare nelle tipologie: | 1.1 Articolo in rivista |
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| File | Descrizione | Tipologia | Licenza | |
|---|---|---|---|---|
| 2015_JEDS_Mingda_Two-Dimensional Heterojunction.pdf | 2015_JEDS_Mingda_Two-Dimensional Heterojunction | Documento in Post-print | Accesso ristretto Richiedi una copia | |
| JEDS2014.pdf | Documento in Pre-print |  | Open Access Visualizza/Apri |
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