We present experimental data on analog device performance of p-type planar- and gate all around (GAA) nanowire (NW) Tunnel-FETs (TFETs) as well as on n-type Tri-Gate-TFETs. A significant improvement of the analog performance by enhancing the electrostatics from planar TFETs to GAA-NW-TFETs with diameters of 20 nm and 10 nm is demonstrated. A maximum transconductance of 122 mu S/mu m and on-currents up to 23 mu A/mu m at a gate overdrive of V-gt = V-d = -1 V were achieved for the GAA NW-pTFETs. Furthermore, a good output current-saturation is observed leading to high intrinsic gain up to 217. The Tr-Gate nTFETs beat the fundamental MOSFET limit for the subthreshold slope of 60 mV/dec and by that also reach extremely high transconductance efficiencies up to 82 V-1.
Experimental demonstration of improved analog device performance of nanowire-TFETs
SELMI, Luca;
2015-01-01
Abstract
We present experimental data on analog device performance of p-type planar- and gate all around (GAA) nanowire (NW) Tunnel-FETs (TFETs) as well as on n-type Tri-Gate-TFETs. A significant improvement of the analog performance by enhancing the electrostatics from planar TFETs to GAA-NW-TFETs with diameters of 20 nm and 10 nm is demonstrated. A maximum transconductance of 122 mu S/mu m and on-currents up to 23 mu A/mu m at a gate overdrive of V-gt = V-d = -1 V were achieved for the GAA NW-pTFETs. Furthermore, a good output current-saturation is observed leading to high intrinsic gain up to 217. The Tr-Gate nTFETs beat the fundamental MOSFET limit for the subthreshold slope of 60 mV/dec and by that also reach extremely high transconductance efficiencies up to 82 V-1.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
