Ionizing radiation effects in nanoscale CMOS technologies exposed to ultra-high doses

This thesis studies the effects of radiation in nanoscale CMOS technologies exposed to ultra-high total ionizing doses (TID), up to 1 Grad(SiO2). These extreme radiation levels are orders of magnitude higher that those typically experienced by space applications (where radiation effects in electronic are of concern). However, they can be found in some specific applications like the large-hadron-collider (LHC) of CERN, and, in particular, in its future upgrade, the high-luminosity LHC (HL-LHC). The study at such high doses has both revealed new phenomena, and has contributed to a better understanding of some of the already known radiation-induced effects. The radiation response of four different CMOS technology nodes, i.e., 130, 65, 40 and 28 nm, coming from different manufacturers, has been investigated in different conditions of temperature, bias, dose-rate and for different transistor’s sizes, providing an unique and comprehensive set of data about the ultra-high TID-induced phenomena in modern CMOS technologies. This study has confirmed that the thin gate oxide of nanoscale technologies is extremely robust to radiation, even at ultra-high doses. The main cause of performance degradation has been identified in the presence of auxiliary oxides such as shallow trench insulation oxides (STI) and spacers. Both radiation-induced drain-to-source leakage current increase and radiation-induced narrow channel effect (RINCE) are caused by positive charge trapped in the STI. In this work, thanks to exposures to very high TID levels and to measurements performed in different conditions of temperature and bias, we show that the two effects are provoked by charge trapped in different locations along the trench oxide. Moreover, a new unexpected ultra-high-dose drain current increase (UCLI) effect, affecting narrow and long nMOS transistors, has been observed. In-depth studies of the radiation-induced short channel effect (RISCE), related to the presence of the spacers, have shown that, at ultra-high doses, the degradation mechanism consists of two phases. A first increase of the series resistance, caused by the radiation-induced charge trapping in the spacers, is followed by a threshold voltage shift provoked by the transport of hydrogen ions from the spacers to the gate oxide. This model has been validated by several static measurements, TCAD simulations and charge pumping measurements. The dependencies of these effects on bias, temperature and size of the transistors have also been studied in detail. Moreover, an unexpected true dose-rate sensitivity has been measured in both nMOS and pMOS transistors in 65 and 130 nm technologies, although the radiation response of MOS devices is considered insensitive to true dose-rate effects. The current degradation in samples irradiated at a dose-rate comparable to that expected in the HL-LHC is larger by a factor of ∼2 than that measured in the typical qualification test, usually carried out with a much higher dose-rate. This is clearly of serious concern for the qualification of circuits designed for the particle detectors of the HL-LHC.