Spiking Neural Networks and Ferroelectric Based Devices for Neuromorphic Computing

Thanks to the rise of IoT and wearable electronics, smart sensors and low-power edge systems are becoming increasingly prevalent in our daily lives. In particular, the pursuit of more interactive and intelligent systems pushed research and industry toward the integration of non-conventional algorithms into electronic appliances. Consequently, AI and deep learning, have been proposed as a solution to a multitude of algorithmic-difficult problems, such as facial and speech recognition, sentiment analysis, text synthesis, autonomous driving, etc. However, edge devices, due to their limited dimensions and serious energy constraints, present some limitations for the elaboration of deep neural networks. Hence, a popular strategy is to send the raw information acquired by the low-power devices to the cloud and wait for a processed response, instead of performing the computation locally. However, this approach increases the computational overhead of cloud servers, it leads to a quite long response latency and, moreover, it fails when the internet connection is not available. An alternative solution consists in moving computational capabilities directly to the edge through a distributed computing network, which can locally process data directly on its nodes. For edge computing, however, the energy budget required by DNNs running on conventional elaboration systems is problematic. Therefore, because a large fraction of the energy is dissipated by moving data back and forth from the memory, significant efforts are being devoted to overcome the so-called von-Neumann bottleneck. In such a context, neuromorphic computing has been developed to improve AI energy requirements by exploiting biologically-inspired neural networks. This new AI branch exploits VLSI analog circuits to implement SNNs in hardware, thus closely mimicking the biological power reduction strategies. This thesis aims to investigate and model neuromorphic solutions for more energy-efficient AI applications. In particular, we observed in deep SNNs that the average spike rate tends to increase with the number of layers, leading to a decreased energy efficiency during both the learning and the inference phases. In order to contrast this behavior, measures must be taken to control the spike rate without inducing a large number of silent neurons, which do not emit spikes and do not contribute to the training process. Therefore, we present a 2-phase training strategy for deep feed-forward SNNs: our approach modifies the loss functions and introduces two phases of training to reduce the spike rate and address the silent neuron issue. Moreover, we also examined the most important circuital implementations of SNNs and neuromorphic platforms to understand the challenges and the current state of the art of this topic. Then, this thesis delves into the design techniques for ferroelectric-based memristors and their applications in neuromorphic devices, specifically focusing on FTJs as promising devices for implementing synaptic-like capabilities. In particular, we merged a model for the polarization dynamics in MFIM structures, with a novel charge-trapping model, in order to investigate the relationship between ferroelectric polarization and charge trapping in the dielectric stack. Our simulation results, calibrated against experiments, present evidence that the partial compensation of the ferroelectric polarization due to trapped charges strongly influences the operation of HZO based FTJs. The red thread linking the activities on the training of SNNs to those on FTJs based devices is the improvement of the energy efficiency in neuromorphic systems.