This paper presents a high-speed simultaneous bidirectional transceiver (SBT) for on-chip wireline communications. A MOS hybrid transistor is utilized to split the received data from the superimposed signal at both ends of the on-chip interconnection with the assistance of two drivers, namely main and auxiliary. Moreover, a high-pass filter (HPF) is used as a differentiator to generate the echo cancelation signal. Consequently, the echo-cancelation for simultaneous bidirectional signaling (SBS) is realized by the combination of the hybrid device and the differentiator. The proposed SBT has been designed and evaluated using 28-nm CMOS technology over a narrow 5-mm on-chip interconnection, which possesses 11.9-dB loss at the Nyquist frequency (half a bit rate). The energy-efficiency of the proposed full-duplex transceiver (FDT) for 20-Gbps simultaneous bidirectional data transmission is 0.147 PJ/b/mm. The performance results show that the proposed SBT has better overall performance compared to the previous architectures reported in the literature to date. The layout of the presented SBT occupies a low area of 1574 μm2.
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