This letter presents a linearization technique for multisampled pulsewidth modulators (MSPWMs) employed in digitally controlled dc-dc converters. MSPWMs, i.e., PWMs operated at a sampling rate strictly higher than the switching frequency, greatly reduce the significant small-signal phase lag exhibited by conventional single-sampled PWMs, thus enabling for high-bandwidth design. On the other hand, the increased sampling frequency generates nonlinear phenomena known as sampling-induced dead bands, which represent zero differential gain regions in the modulator transcharacteristic that degrade the system closed-loop operation. This letter proposes a correction algorithm that allows for dead band removal, thus linearizing the PWM behavior, while still retaining the multisampling benefits. This result is achieved by a simple solution that can be easily implemented with simple hardware requirements. Simulation and experimental results on a dc-dc synchronous buck converter are provided to show the effectiveness and overall simplicity of the proposed solution.
Elimination of Sampling-Induced Dead Bands in Multiple-Sampled Pulsewidth Modulators for DC DC Converters
SAGGINI, Stefano
2009-01-01
Abstract
This letter presents a linearization technique for multisampled pulsewidth modulators (MSPWMs) employed in digitally controlled dc-dc converters. MSPWMs, i.e., PWMs operated at a sampling rate strictly higher than the switching frequency, greatly reduce the significant small-signal phase lag exhibited by conventional single-sampled PWMs, thus enabling for high-bandwidth design. On the other hand, the increased sampling frequency generates nonlinear phenomena known as sampling-induced dead bands, which represent zero differential gain regions in the modulator transcharacteristic that degrade the system closed-loop operation. This letter proposes a correction algorithm that allows for dead band removal, thus linearizing the PWM behavior, while still retaining the multisampling benefits. This result is achieved by a simple solution that can be easily implemented with simple hardware requirements. Simulation and experimental results on a dc-dc synchronous buck converter are provided to show the effectiveness and overall simplicity of the proposed solution.File | Dimensione | Formato | |
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