The goal of this PhD has been to model, design and characterize a 10Gbps serial interface suitable for automotive Electronic Control Units (ECU). The work has been carried out in collaboration with Infineon Technology. High speed serial interfaces are a hot topic both in the academic and industrial world. Due to the stringent safety requirements and the extremely harsh environment in which the link must be able to correctly operate, the automotive sector lags some years behind the consumer market. Thus, the main goal of this work is to bridge the gap between the consumer electronic and the automotive electronic unit world, understanding which techniques are suitable for our working conditions among the ones that are already well established in the academic world and translating and improving these solutions to possibly make them more stable and less power consuming. This goal implies a deep understanding of a serial link both at system and transistor level, and the development of this thesis will follow this idea. The first part of this work is dedicated to the transmitter: we will start from a system level analysis, creating a methodology to assess the equalization capability that has to be foreseen at transmitter side when dealing when channels typical of the automotive environment. The description of the transistor level design will follow, motivating design choices and supporting them with simulation results and comparison with the state of the art presented in literature. To conclude this first part of the work, measurements of the described transmitter will be presented and discussed. The second part of the thesis is mainly focused on the receiver. As for the transmitter, we will start with a system level analysis, aimed at understanding the different equalization schemes proposed in the literature. With the help of a Simulink model, an architecture will be proposed. The transistor level analysis of the aforementioned architecture will follow and will be supported by transistor level simulations of the receiver alone and of the complete transceiver, along with the digital control part. Finally, an experimental characterization of the full link will be presented, analyzing its performances with measurements performed in the design center of Infineon Technologies, Villach (A).
Characterization, Modeling and Design of a 10Gbps Serial Link / Andrea Bandiziol , 2018 Mar 12. 30. ciclo, Anno Accademico 2016/2017.
Characterization, Modeling and Design of a 10Gbps Serial Link
BANDIZIOL, ANDREA
2018-03-12
Abstract
The goal of this PhD has been to model, design and characterize a 10Gbps serial interface suitable for automotive Electronic Control Units (ECU). The work has been carried out in collaboration with Infineon Technology. High speed serial interfaces are a hot topic both in the academic and industrial world. Due to the stringent safety requirements and the extremely harsh environment in which the link must be able to correctly operate, the automotive sector lags some years behind the consumer market. Thus, the main goal of this work is to bridge the gap between the consumer electronic and the automotive electronic unit world, understanding which techniques are suitable for our working conditions among the ones that are already well established in the academic world and translating and improving these solutions to possibly make them more stable and less power consuming. This goal implies a deep understanding of a serial link both at system and transistor level, and the development of this thesis will follow this idea. The first part of this work is dedicated to the transmitter: we will start from a system level analysis, creating a methodology to assess the equalization capability that has to be foreseen at transmitter side when dealing when channels typical of the automotive environment. The description of the transistor level design will follow, motivating design choices and supporting them with simulation results and comparison with the state of the art presented in literature. To conclude this first part of the work, measurements of the described transmitter will be presented and discussed. The second part of the thesis is mainly focused on the receiver. As for the transmitter, we will start with a system level analysis, aimed at understanding the different equalization schemes proposed in the literature. With the help of a Simulink model, an architecture will be proposed. The transistor level analysis of the aforementioned architecture will follow and will be supported by transistor level simulations of the receiver alone and of the complete transceiver, along with the digital control part. Finally, an experimental characterization of the full link will be presented, analyzing its performances with measurements performed in the design center of Infineon Technologies, Villach (A).File | Dimensione | Formato | |
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