We present an approach, and its implementation in a computer program, for the three-dimensional (3-D) simulation of realistic single electron transistor (SET) structures, in which subregions with different degrees of quantum confinement are simultaneously considered. The proposed approach is based on the self-consistent solution of the many body Schrodinger equation with density functional theory and on the computation of the conductance of tunnel constrictions through the solution of the 3-D Schrodinger equation with open boundary conditions. We have developed an efficient code (ViDES) based on such an approach. As examples of addressable SET structures, we present the simulation of a SET, one defined by metal gates on an AlGaAs/GaAs heterostructures, and of a SET defined by etching and oxidation on the silicon-on-insulator material system. Since SETs represent prototypical nanoscale devices, the code may be a valuable tool for the investigation and optimization of a broad range of nanoelectronic solid-state devices.
Three-dimensional simulation of realistic single electron transistors
Pala M;
2005-01-01
Abstract
We present an approach, and its implementation in a computer program, for the three-dimensional (3-D) simulation of realistic single electron transistor (SET) structures, in which subregions with different degrees of quantum confinement are simultaneously considered. The proposed approach is based on the self-consistent solution of the many body Schrodinger equation with density functional theory and on the computation of the conductance of tunnel constrictions through the solution of the 3-D Schrodinger equation with open boundary conditions. We have developed an efficient code (ViDES) based on such an approach. As examples of addressable SET structures, we present the simulation of a SET, one defined by metal gates on an AlGaAs/GaAs heterostructures, and of a SET defined by etching and oxidation on the silicon-on-insulator material system. Since SETs represent prototypical nanoscale devices, the code may be a valuable tool for the investigation and optimization of a broad range of nanoelectronic solid-state devices.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.