We present a novel non-volatile memory cell architecture, which remarkably improves injection efficiency overconventional channel hot electron programming. We show how this superior performance can be traded to achieve either lowvoltage-low power or high-speed operation. The cell concept is validated by means of numerical device simulations. Criteriafor device optimization are also discussed.
BipFLASH: a Novel Non-Volatile Memory Cell Concept for High Speed - Low Power Applications
ESSENI, David;SELMI, Luca
2001-01-01
Abstract
We present a novel non-volatile memory cell architecture, which remarkably improves injection efficiency overconventional channel hot electron programming. We show how this superior performance can be traded to achieve either lowvoltage-low power or high-speed operation. The cell concept is validated by means of numerical device simulations. Criteriafor device optimization are also discussed.File in questo prodotto:
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