In CMOS technologies, rapidly becoming the most important ones for VLSI microelectronics, the inherent phenomenon of latch-up, represents one of the most serious limitations for further dimension scaling in the deep sub-micron range. For this reason latch-up has attracted a lot of attention in the last decade and a deep understanding of its essential features has been achieved, although a few specific problems are still to be satisfactorily solved.
Latch-up in CMOS circuits: a review
SANGIORGI, Enrico;SELMI, Luca;
1990-01-01
Abstract
In CMOS technologies, rapidly becoming the most important ones for VLSI microelectronics, the inherent phenomenon of latch-up, represents one of the most serious limitations for further dimension scaling in the deep sub-micron range. For this reason latch-up has attracted a lot of attention in the last decade and a deep understanding of its essential features has been achieved, although a few specific problems are still to be satisfactorily solved.File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.


