ROLLO, TOMMASO

ROLLO, TOMMASO  

DPIA - DIPARTIMENTO POLITECNICO DI INGEGNERIA E ARCHITETTURA  

Mostra records
Risultati 1 - 13 di 13 (tempo di esecuzione: 0.035 secondi).
Titolo Data di pubblicazione Autore(i) File
Accurate and Efficient Dynamic Simulations of Ferroelectric Based Electron Devices 1-gen-2019 Rollo, T.; Daniel, L.; Esseni, D.
Energy minimization and Kirchhoff’s laws in Negative Capacitance Ferroelectric Capacitors and MOSFETs 1-gen-2017 Rollo, Tommaso; Esseni, David
Essential Physics of the OFF-State Current in Nanoscale MOSFETs and Tunnel FETs 1-gen-2015 Esseni, David; Pala, M. G.; Rollo, Tommaso
Ferroelectric Negative Capacitance Transistors as Beyond Tunnel-FETs, Steep-Slope Devices: a Modeling, Simulation and Design Study 8-mar-2019 Rollo, Tommaso
Influence of interface traps on ferroelectric NC-FETs 1-gen-2018 Rollo, Tommaso; Esseni, David
New design perspective for Ferroelectric NC-FETs 1-gen-2018 Rollo, Tommaso; Esseni, David
New device concepts, transistor architectures and materials for high performance and energy efficient CMOS circuits in the forthcoming era of 3D integrated circuits 1-gen-2018 Esseni, D.; Badami, Oves Mohamed Hussein; Driussi, F.; Lizzit, D.; Pala, M.; Palestri, P.; Rollo, T.; Selmi, L.; Venica, S.
A review of selected topics in physics based modeling for tunnel field-effect transistors 1-gen-2017 Esseni, David; Pala, Marco; Palestri, Pierpaolo; Alper, Cem; Rollo, Tommaso
Revised analysis of negative capacitance in ferroelectric-insulator capacitors: analytical and numerical results, physical insight, comparison to experiments 1-gen-2019 Rollo, T.; Blanchini, F.; Giordano, G.; Specogna, R.; Esseni, D.
A simulation based study of NC-FETs design: Off-state versus on-state perspective 1-gen-2019 Rollo, T.; Wang, H.; Han, G.; Esseni, D.
Stabilization of negative capacitance in ferroelectric capacitors with and without a metal interlayer 1-gen-2020 Rollo, Tommaso; Esseni, David; Giulia, Giordano; Specogna, Ruben; Blanchini, Franco
Supersteep Retrograde Doping in Ferroelectric MOSFETs for sub-60mV/dec Subthreshold Swing 1-gen-2016 Rollo, Tommaso; Esseni, David
Tunnel FETsfor Ultra-Low Voltage Digital VLSI Circuits: Part I - Device-Circuit Interaction and Evaluation at Device Level 1-gen-2014 Esseni, David; M., Guglielmini; Kapidani, Bernard; Rollo, Tommaso; M., Alioto