This paper deals with the design of single-stage differential low-noise amplifiers for ultra-wideband (UWB) applications, comparing state-of-the-art planar bulk and silicon-on-insulator (SOI) FinFET CMOS technologies featuring 45-nm gate length. To ensure a broadband input impedance matching, the g m-boosted topology has been chosen. Furthermore, the amplifiers have been designed to work over the whole UWB band (3.1-10.6 GHz), while driving a capacitive load, which is a realistic assumption for direct conversion receivers where the amplifier directly drives a mixer. The simulations (based on compact models obtained from preliminary measurements) highlight that, at the present stage of the technology development, the planar version of the circuit appears to outperform the FinFET one. The main reason is the superior cutoff frequency of planar devices in the inversion region, which allows the achievement of noise figure and voltage gain comparable to the FinFET counterpart, with a smaller power consumption.

Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices

PONTON, Davide;PALESTRI, Pierpaolo;ESSENI, David;SELMI, Luca;
2009-01-01

Abstract

This paper deals with the design of single-stage differential low-noise amplifiers for ultra-wideband (UWB) applications, comparing state-of-the-art planar bulk and silicon-on-insulator (SOI) FinFET CMOS technologies featuring 45-nm gate length. To ensure a broadband input impedance matching, the g m-boosted topology has been chosen. Furthermore, the amplifiers have been designed to work over the whole UWB band (3.1-10.6 GHz), while driving a capacitive load, which is a realistic assumption for direct conversion receivers where the amplifier directly drives a mixer. The simulations (based on compact models obtained from preliminary measurements) highlight that, at the present stage of the technology development, the planar version of the circuit appears to outperform the FinFET one. The main reason is the superior cutoff frequency of planar devices in the inversion region, which allows the achievement of noise figure and voltage gain comparable to the FinFET counterpart, with a smaller power consumption.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11390/878443
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